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1

A Circuit for Concurrent Detection of Soft and Timing Errors in Digital CMOS ICs

S. Matakias, Y. Tsiatouhas, A. Arapoyanni, Th. Haniotakis

Journal:

Journal of Electronic Testing

Year:

2004

Language:

english

File:

PDF, 682 KB

english, 2004

2

Periodic Monitoring of BTI Induced Aging in SRAM Sense Amplifiers

Dounavi, Helen-Maria, Sfikas, Yiorgos, Tsiatouhas, Yiorgos

Journal:

IEEE Transactions on Device and Materials Reliability

Year:

2019

Language:

english

File:

PDF, 37 KB

english, 2019

3

State reduction for efficient digital calibration of analog/RF integrated circuits

Liaperdos, John, Arapoyanni, Angela, Tsiatouhas, Yiorgos

Journal:

Analog Integrated Circuits and Signal Processing

Year:

2017

Language:

english

File:

PDF, 1.42 MB

english, 2017

4

[IEEE 2015 IEEE International Symposium on Circuits and Systems (ISCAS) - Lisbon, Portugal (2015.5.24-2015.5.27)] 2015 IEEE International Symposium on Circuits and Systems (ISCAS) - On the reuse of existing error tolerance circuitry for low power scan testing

Anastasiou, Anthi, Tsiatouhas, Yiorgos, Arapoyanni, Angela

Year:

2015

Language:

english

File:

PDF, 439 KB

english, 2015

5

[IEEE 2006 IEEE International Symposium on Circuits and Systems - Island of Kos, Greece (21-24 May 2006)] 2006 IEEE International Symposium on Circuits and Systems - High fan-in differential current mirror logic

Tsiatouhas, Y., Arapoyanni, A.

Year:

2006

Language:

english

File:

PDF, 2.07 MB

english, 2006

6

A Built-In Voltage Measurement Technique for the Calibration of RF Mixers

Liaperdos, John, Arapoyanni, Angela, Tsiatouhas, Yiorgos

Journal:

IEEE Transactions on Instrumentation and Measurement

Year:

2013

Language:

english

File:

PDF, 7.01 MB

english, 2013

7

[IEEE 2002 IEEE International Symposium on Circuits and Systems - Phoenix-Scottsdale, AZ, USA (26-29 May 2002)] 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353) - SRAM oriented memory sense amplifier design in 0.18 μm CMOS technology

Chrisanthopoulos, A., Tsiatouhas, Y., Arapoyanni, A., Haniotakis, Th.

Year:

2002

Language:

english

File:

PDF, 347 KB

english, 2002

8

[IEEE Conference Publications Design, Automation and Test in Europe - Grenoble, France (2015.03.9-2015.03.13)] Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015 - A Method for the Estimation of Defect Detection Probability of Analog/RF Defect-Oriented Tests

Liaperdos, John, Arapoyanni, Angela, Tsiatouhas, Yiorgos

Year:

2015

Language:

english

File:

PDF, 1.14 MB

english, 2015

9

[IEEE 2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) - Rhodes, Greece (2019.7.1-2019.7.3)] 2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) - On the Static CMOS Implementation of Magnitude Comparators

Efstathiou, Costas, Tsiatouhas, Yiorgos

Year:

2019

Language:

english

File:

PDF, 281 KB

english, 2019

10

A current monitoring technique for IDDQ testing in digital integrated circuits

Matakias, Sotiris, Tsiatouhas, Yiorgos, Arapoyanni, Angela, Haniotakis, Themistoklis

Journal:

Integration, the VLSI Journal

Year:

2015

Language:

english

File:

PDF, 3.89 MB

english, 2015

11

Comparative study of different current mode sense amplifiers in submicron CMOS technology

Chrisanthopoulos, A., Moisiadis, Y., Tsiatouhas, Y., Arapoyanni, A.

Journal:

IEE Proceedings - Circuits Devices and Systems

Year:

2002

Language:

english

File:

PDF, 497 KB

english, 2002

12

[IEEE 2012 7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) - Tunis, Tunisia (2012.05.16-2012.05.18)] 7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era - A novel architecture to reduce test time in march-based SRAM tests

Voyiatzis, I., Efstathiou, C., Tsiatouhas, Y., Sgouropoulou, C.

Year:

2012

Language:

english

File:

PDF, 298 KB

english, 2012

13

Effective Timing Error Tolerance in Flip-Flop Based Core Designs

Valadimas, Stefanos, Tsiatouhas, Yiorgos, Arapoyanni, Angela, Xarchakos, Petros

Journal:

Journal of Electronic Testing

Year:

2013

Language:

english

File:

PDF, 996 KB

english, 2013

14

A design for testability technique for mixed-signal differential circuits*

Dermentzoglou, L, Tsiatouhas, Y, Arapoyanni, A

Journal:

Journal of Physics Conference Series

Year:

2005

Language:

english

File:

PDF, 163 KB

english, 2005

15

[IEEE 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Pittsburgh, PA, USA (2016.7.11-2016.7.13)] 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Low-Power and High Performance Sinusoidal Clocked Dynamic Circuit Design

Katreepalli, Raghava, Chemanchula, Hemanth, Haniotakis, Themistoklis, Tsiatouhas, Yiorgos

Year:

2016

Language:

english

File:

PDF, 706 KB

english, 2016

16

Device simulation of a n-DMOS cell with trench isolation

G Kamoulakos, Th Haniotakis, Y Tsiatouhas, J.-P Schoellkopf, A Arapoyanni

Journal:

Microelectronics Journal

Year:

2001

Language:

english

File:

PDF, 864 KB

english, 2001

17

Robust test generation for transistor stuck-open faults in CMOS complex gates

TSIATOUHAS, Y., PASCHALIS, A., NIKOLOS, D., HALATSIS, C.

Journal:

International Journal of Electronics

Year:

1995

Language:

english

File:

PDF, 259 KB

english, 1995

18

A new technique for IDDQ testing in nanometer technologies

Y. Tsiatouhas, Y. Moisiadis, Th. Haniotakis, D. Nikolos, A. Arapoyanni

Journal:

Integration, the VLSI Journal

Year:

2002

Language:

english

File:

PDF, 194 KB

english, 2002

19

[IEEE 2017 6th International Conference on Modern Circuits and Systems Technologies (MOCAST) - Thessaloniki, Greece (2017.5.4-2017.5.6)] 2017 6th International Conference on Modern Circuits and Systems Technologies (MOCAST) - BTI and HCI degradation detection in SRAM cells

Sfikas, Yiorgos, Tsiatouhas, Yiorgos

Year:

2017

Language:

english

File:

PDF, 600 KB

english, 2017

20

[IEEE 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS) - Thessaloniki, Greece (2017.7.3-2017.7.5)] 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS) - Variation tolerant BTI monitoring in SRAM cells

Sfikas, Yiorgos, Tsiatouhas, Yiorgos

Year:

2017

File:

PDF, 314 KB

2017

21

Static Power Reduction Using Variation-Tolerant and Reconfigurable Multi-Mode Power Switches

Zhang, Zhaobo, Kavousianos, Xrysovalantis, Chakrabarty, Krishnendu, Tsiatouhas, Yiorgos

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2014

Language:

english

File:

PDF, 2.11 MB

english, 2014

22

[IEEE 2014 19th IEEE European Test Symposium (ETS) - Paderborn, Germany (2014.5.26-2014.5.30)] 2014 19th IEEE European Test Symposium (ETS) - Power efficient scan testing by exploiting existing error tolerance circuitry in a design

Anastasiou, Anthi, Tsiatouhas, Yiorgos

Year:

2014

Language:

english

File:

PDF, 207 KB

english, 2014

23

[IEEE Comput. Soc 10th IEEE International On-Line Testing Symposium - Funchal, Madeira Island, Portugal (12-14 July 2004)] Proceedings. 10th IEEE International On-Line Testing Symposium - A new dynamic circuit design technique for high performance TSC checker implementations [totally self checking circuits]

Rao, A., Haniotakis, T., Tsiatouhas, Y., Kaky, V.

Year:

2004

Language:

english

File:

PDF, 345 KB

english, 2004

24

[IEEE 2011 IEEE 9th International New Circuits and Systems Conference (NEWCAS) - Bordeaux, France (2011.06.26-2011.06.29)] 2011 IEEE 9th International New Circuits and systems conference - High performance and low power dynamic circuit design

Owda, Zaher, Tsiatouhas, Yiorgos, Haniotakis, Themistoklis

Year:

2011

Language:

english

File:

PDF, 198 KB

english, 2011

25

Soft error immune latch under SEU related double-node charge collection

K. Katsarou, Y. Tsiatouhas

Year:

2015

Language:

english

File:

PDF, 541 KB

english, 2015

26

[IEEE 2003 10th IEEE International Conference on Electronics, Circuits, and Systems - Sharjah, United Arab Emirates (14-17 Dec. 2003)] 10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 - A novel scheme for testing radio frequency voltage controlled oscillators

Dermentzoglou, L., Tsiatouhas, Y., Arapoyanni, A.

Year:

2003

Language:

english

File:

PDF, 306 KB

english, 2003

27

Domino CMOS SCD/SFS 2-out-of-3 and 1-out-of-3 code checkers

Haniotakis, Th., Tsiatouhas, Y., Efstathiou, C., Nikolos, D.

Journal:

International Journal of Electronics

Year:

2003

Language:

english

File:

PDF, 145 KB

english, 2003

28

Built-In Self-Test, Diagnosis, and Repair of MultiMode Power Switches

Wang, Ran, Zhang, Zhaobo, Kavousianos, Xrysovalantis, Tsiatouhas, Yiorgos, Chakrabarty, Krishnendu

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 1.41 MB

english, 2014

29

Testing Neighbouring Cell Leakage and Transition Induced Faults in DRAMs

Sfikas, Yiorgos, Tsiatouhas, Yiorgos

Journal:

IEEE Transactions on Computers

Year:

2015

Language:

english

File:

PDF, 180 KB

english, 2015

30

Design of stuck-open fault testable CMOS complex gates

Tsiatouhas, Y., Haniotakis, Th., Halatsis, C., Arapoyanni, A.

Journal:

Electronics Letters

Year:

1996

Language:

english

File:

PDF, 437 KB

english, 1996

31

[IEEE 2014 9th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) - Santorini, Greece (2014.5.6-2014.5.8)] 2014 9th IEEE International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) - Stuck-at fault diagnosis in scan chains

Dounavi, Helen-Maria, Tsiatouhas, Yiorgos

Year:

2014

Language:

english

File:

PDF, 317 KB

english, 2014

32

Path delay fault testing of multiplexer-based shifters

Vergos, H. T., Tsiatouhas, Y., Haniotakis, Th., Nikolos, D., Nicolaidis, M.

Journal:

International Journal of Electronics

Year:

2001

Language:

english

File:

PDF, 289 KB

english, 2001

33

Timing Error Tolerance in Small Core Designs for SoC Applications

Valadimas, Stefanos, Tsiatouhas, Yiorgos, Arapoyanni, Angela

Journal:

IEEE Transactions on Computers

Year:

2015

Language:

english

File:

PDF, 875 KB

english, 2015

34

[IEEE ICECS 2000. 7th IEEE International Conference on Electronics, Circuits and Systems - Jounieh, Lebanon (17-20 Dec. 2000)] ICECS 2000. 7th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.00EX445) - New memory sense amplifier designs in CMOS technology

Tsiatouhas, Y., Chrisanthopoulos, A., Kamoulakos, G., Haniotakis, T.

Year:

2000

Language:

english

File:

PDF, 345 KB

english, 2000

35

[IEEE Comput. Soc Ninth Great Lakes Symposium on VLSI - Ypsilanti, MI, USA (4-6 March 1999)] Proceedings Ninth Great Lakes Symposium on VLSI - On path delay fault testing of multiplexer-based shifters

Vergos, H.T., Tsiatouhas, Y., Haniotakis, T., Nikolos, D., Nicolaidis, M.

Year:

1999

Language:

english

File:

PDF, 51 KB

english, 1999

36

A Design Technique for Energy Reduction in NORA CMOS Logic

Limniotis, Konstantinos, Tsiatouhas, Yiorgos, Haniotakis, Themistoklis, Arapoyanni, Angela

Journal:

IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications

Year:

2006

Language:

english

File:

PDF, 786 KB

english, 2006

37

[IEEE 2020 IEEE European Test Symposium (ETS) - Tallinn, Estonia (2020.5.25-2020.5.29)] 2020 IEEE European Test Symposium (ETS) - Monitoring of BTI and HCI Aging in SRAM Decoders

Dounavi, Helen-Maria, Tsiatouhas, Yiorgos

Year:

2020

File:

PDF, 338 KB

2020

38

Adjustable RF Mixers' Alternate Test Efficiency Optimization by the Reduction of Test Observables

Liaperdos, John, Arapoyanni, Angela, Tsiatouhas, Yiorgos

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2013

Language:

english

File:

PDF, 1.01 MB

english, 2013

39

[IEEE 2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) - Rhodes, Greece (2019.7.1-2019.7.3)] 2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) - On the Static CMOS Implementation of Magnitude Comparators

Efstathiou, Costas, Tsiatouhas, Yiorgos

Year:

2019

File:

PDF, 281 KB

2019

40

A Stress-Relaxed Negative Voltage-Level Converter

Tsiatouhas, Y.E.

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2007

Language:

english

File:

PDF, 601 KB

english, 2007

41

Low-Power Scan Testing: A Scan Chain Partitioning and Scan Hold Based Technique

Arvaniti, Efi, Tsiatouhas, Yiorgos

Journal:

Journal of Electronic Testing

Year:

2014

Language:

english

File:

PDF, 1.09 MB

english, 2014

42

[IEEE 2011 24th International Conference on VLSI Design: concurrently with the 10th International Conference on Embedded Systems Design - Chennai (2011.01.2-2011.01.7)] 2011 24th Internatioal Conference on VLSI Design - A Robust and Reconfigurable Multi-mode Power Gating Architecture

Zhang, Z, Kavousianos, X, Chakrabarty, K, Tsiatouhas, Y

Year:

2011

Language:

english

File:

PDF, 465 KB

english, 2011

43

Hierarchical robust test generation for CMOS circuit stuck-open faults

TSIATOUHAS, Y., HANIOTAKIS, TH., NIKOLOS, D., PASCHALIS, A., HALATSIS, C.

Journal:

International Journal of Electronics

Year:

1997

Language:

english

File:

PDF, 220 KB

english, 1997

44

[IEEE 11th IEEE International On-Line Testing Symposium - French Riviera, France (2005.07.8-2005.07.8)] 11th IEEE International On-Line Testing Symposium - Fast, parallel two-rail code checker with enhanced testability

Matakias, S., Arapoyanni, A., Efthymiou, A., Tsiatouhas, Y., Haniotakis, T.

Year:

2005

Language:

english

File:

PDF, 154 KB

english, 2005

45

[IEEE 2015 20th IEEE European Test Symposium (ETS) - Cluj-Napoca, Romania (2015.5.25-2015.5.29)] 2015 20th IEEE European Test Symposium (ETS) - On resistive open defect detection in DRAMs: The charge accumulation effect

Sfikas, Yiorgos, Tsiatouhas, Yiorgos, Taouil, Mottaqiallah, Hamdioui, Said

Year:

2015

Language:

english

File:

PDF, 859 KB

english, 2015

46

[IEEE 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS) - Bordeaux, France (2018.12.9-2018.12.12)] 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS) - Low Power and High Speed Static CMOS Digital Magnitude Comparators

Efstathiou, C., Dimolikas, K., Papaioannou, C., Tsiatouhas, Y.

Year:

2018

File:

PDF, 6 KB

2018

47

A high-density DRAM cell with built-in gain stage

Kamoulakos, G., Tsiatouhas, Y., Chrisanthopoulos, A., Arapoyanni, A.

Journal:

IEEE Transactions on Electron Devices

Year:

2001

Language:

english

File:

PDF, 170 KB

english, 2001

48

Test Technology Newsletter

Arvaniti, Efi, Tsiatouhas, Yiorgos

Journal:

Journal of Electronic Testing

Year:

2014

Language:

english

File:

PDF, 230 KB

english, 2014

49

Layout-Based Refined NPSF Model for DRAM Characterization and Testing

Sfikas, Yiorgos, Tsiatouhas, Yiorgos E., Hamdioui, Said

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2014

Language:

english

File:

PDF, 2.19 MB

english, 2014

50

[IEEE Technology of Integrated Systems in Nanoscale Era (DTIS) - Athens, Greece (2011.04.6-2011.04.8)] 2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) - A test technique and a BIST circuit to detect catastrophic faults in RF Mixers

Liaperdos, I., Dermentzoglou, L., Arapoyanni, A., Tsiatouhas, Y.

Year:

2011

Language:

english

File:

PDF, 681 KB

english, 2011

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